1. Field of the Invention
The present invention relates to a high profile wafer processing cassette for processing of silicon wafers utilized in integrated circuits, and more particularly, pertains to a high profile wafer processing cassette with dual cross-section profile geometrically configured teeth and side members, including multi-level, flow-through process wash areas, quick drying surfaces, and reinforced upper edge members for carrying a plurality of silicon wafers for integrated circuit processing in known processes including on-center, centrifugal, bath immersion, and in-line one-wafer-at-a-time processing.
2. Description of the Prior Art
The prior art wafer cassettes have been heavy, bulky, and expensive, and did not provide for sufficient open area for efficient processing of the wafers. Prior art cassettes are not prone to maintaining structural integrity because of structural limitation and often distort or flex in shape to the point of structural fatigue causing breakage of the silicon wafer and failure of the carried circuitry. Sufficient amounts of improperly channeled process wash chemicals are barred from penetrating the interior cavities of the cassette in an efficient, sufficient, and expeditious manner with respect to the sheer bulk construction used in prior art cassettes, as well as blunt exterior teeth edges or limited access end portions. Drainage and drying times of prior art cassettes are unduly lengthy owing to unpolished, irregular cassette surfaces, squared non-rounded corners, unradiused edges and horizontal non-ramped surfaces.
The present invention overcomes the disadvantages of the prior art by providing a high profile wafer processing cassette for processing silicon wafers, or the like, which includes an cross-bar end, an opposing reverse arch end, and a high profile structure providing for non-restrictive, multi-level, open area liquid passage areas between each of the dual profile cross-section reinforced geometrically configured dividers. Drainage fluid flow and drying times are decreased by the use of extremely smooth surface areas, vertex radiused slots, ramped surfaces, filled and radiused corners, rounded edge members, lower recessed edges, and drain scuppers. The cassette provides for on-center processing of integrated circuit wafers in automated integrated circuit processing equipment, and includes robotic handling recesses and notches. The wafer cassette can be made from Teflon PFA, or like materials, which withstands chemical etching processes in addition to being accepted by present day robotic wafer automated machines.